Advanced UVM for ASIC Design Verification
Master advanced UVM techniques for complex ASIC verification, including phasing, coverage-driven verification, reusable components, formal methods, and CI/regression.
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UVM Phasing Deep Dive
Unit 1: Understanding UVM Phasing
Intro to UVM Phasing
UVM Phase Domains
The Build Phase
Connect and End-of-Elab
Start of Simulation
Unit 2: The Run Phase and Beyond
The Heart of UVM: Run
Extracting Data: Extract
The Check Phase
Report and Final Cleanup
Phase Callbacks
Unit 3: Advanced Phasing Techniques
Creating Custom Phases
Phase Jumping
Objections and Synchronization
Debugging Phase Issues
Advanced Phase Control
Lock/Unlock Semantics in UVM
Unit 1: Introduction to Lock/Unlock Semantics
Why Lock/Unlock?
Lock/Unlock Basics
UVM's `uvm_mutex` Class
Simple Lock/Unlock Example
Unit 2: Implementing Lock/Unlock Mechanisms
Locking Granularity
Locking Multiple Resources
Try_lock() Explained
Lock Timeout
Hierarchical Locking
Unit 3: Advanced Lock/Unlock Strategies
Locking in Sequences
Locking in Agents
Locking in Scoreboards
Debugging Lock Issues
Best Practices
Advanced Sequence Control
Unit 1: Sequence Fundamentals Revisited
Sequence Recap
Body Method Deep Dive
Sequence Item Fields
Unit 2: Branching and Looping
Conditional Execution
Looping Constructs
Randomization in Loops
Unit 3: Sequence Libraries and Virtual Sequences
Creating Sequence Libs
Virtual Sequences
Sequence Library Manager
Unit 4: Sequence Layering and Arbitration
Sequence Layering Basics
Sequence Arbitration
Advanced Arbitration
Unit 5: Real-World Applications
Multi-Agent Scenarios
Protocol Verification
Error Injection
Coverage-Driven Verification (CDV) Fundamentals
Unit 1: Introduction to Coverage-Driven Verification
What is CDV?
Why Use CDV?
CDV Flow Overview
Coverage Plan Basics
Metrics: Functional vs Code
Unit 2: Coverage Metrics in Detail
Functional Coverage Types
Code Coverage Types
Toggle Coverage
Expression Coverage
FSM Coverage
Unit 3: Developing and Tracking a Coverage Plan
Creating a CDV Plan
Spec to Coverage Mapping
Tracking Coverage Progress
Coverage Closure
CDV Plan Maintenance
Functional Coverage Implementation
Unit 1: Introduction to Functional Coverage
What is Func. Coverage?
Coverage Groups & Points
Coverage Options
Coverage Bins
Sampling Techniques
Unit 2: Advanced Coverage Techniques
Cross Coverage Intro
Cross Coverage Options
Parameterized Covergroups
Coverage and Classes
Coverage Methods
Unit 3: Coverage Analysis and Reporting
Coverage Report Basics
Analyzing Coverage Holes
Fixing Coverage Holes
Coverage Options
Coverage Best Practices
Code Coverage Analysis
Unit 1: Introduction to Code Coverage
What is Code Coverage?
Statement Coverage
Branch Coverage
Condition Coverage
FSM State Coverage
Unit 2: Advanced Code Coverage Metrics
Toggle Coverage
Expression Coverage
Path Coverage
Call Coverage
Advanced Metrics
Unit 3: Using Code Coverage Tools
Tool Intro
Running Coverage
Analyzing Reports
Coverage Exceptions
Merging Coverage Data
Unit 4: Improving Code Coverage
Targeted Tests
Coverage Review
Reusable Verification Components (UVCs)
Unit 1: Introduction to Reusable Verification Components
What are UVCs?
UVC Architecture
UVC Interface
Unit 2: Designing and Implementing UVCs
UVC Design Flow
Agent Implementation
Sequencer Implementation
Driver Implementation
Monitor Implementation
Unit 3: Advanced UVC Features
Configuration
Error Handling
Coverage Collection
Transaction Recording
Unit 4: UVC Integration and Reuse
UVC Integration
UVC Reuse
UVC Verification
UVC Configuration and Parameterization
Unit 1: Introduction to UVM Configuration
Configuring UVCs
UVM Config DB Basics
Setting Configurations
Getting Configurations
Configuration Scope
Unit 2: Advanced Configuration Techniques
Hierarchical Config
Configuration Objects
Factory Overrides
Command Line Config
Callbacks for Config
Unit 3: Managing UVC Dependencies and Advanced Scenarios
UVC Dependencies
Virtual Interfaces
Scoreboard Config
Agent Configuration
Config Best Practices
Assertion-Based Verification (ABV) with SVA
Unit 1: Introduction to Assertion-Based Verification
What is ABV?
Why Use Assertions?
Intro to SystemVerilog
SVA vs. PSL
ABV Flow
Unit 2: SVA Fundamentals
Immediate Assertions
Concurrent Assertions
Sequences in SVA
Properties in SVA
Operators in SVA
Unit 3: Integrating SVA with UVM
SVA in UVM
Binding Assertions
Assertion Severity
Analyzing Failures
Coverage with SVA
Formal Verification Techniques
Unit 1: Introduction to Formal Verification
What is Formal Verif?
Formal vs. Simulation
Formal Verification Flow
Property Specification
Selecting Formal Tools
Unit 2: Formal Verification Techniques
Model Checking
Equivalence Checking
Property Checking
Static Analysis
Symbolic Simulation
Unit 3: Integrating Formal Verification
FV in UVM Testbench
Assertion Integration
Analyzing Results
Debugging with Formal
Best Practices
Advanced Debugging Techniques
Unit 1: Waveform Analysis Fundamentals
Waveform Analysis Intro
Navigating Waveforms
Signal Grouping
Searching Waveforms
Transaction Visualization
Unit 2: Advanced Waveform Techniques
Analyzing Clock Domains
Debugging CDC Issues
Memory Access Analysis
Protocol Decoding
Performance Bottlenecks
Unit 3: UVM Debug Macros and Custom Mechanisms
UVM Debug Macros Intro
Transaction Tracing
Error Reporting
Custom Debug Mechanisms
Debug Automation
UVM Debug Macros and Utilities
Unit 1: Introduction to UVM Debugging
Debugging in UVM
UVM Message Reporting
Message Verbosity
UVM_LOW vs. UVM_HIGH
Custom Message IDs
Unit 2: Advanced UVM Debug Macros
Transaction Tracing
Field Automation
Debug Macros in Sequences
Debug Macros in Drivers
Debug Macros in Monitors
Unit 3: UVM Utilities and Customization
Memory Management
Data Logging
Error Reporting
Custom Debug Macros
Custom Utilities
Continuous Integration (CI) for Verification
Unit 1: CI Fundamentals for Verification
Intro to CI
CI's Role in Verification
CI vs. Traditional
CI Key Terminology
Benefits and Challenges
Unit 2: Setting Up a CI Pipeline
Choosing CI Tools
Setting Up the Server
Configuring the Pipeline
Integrating with VCS
Notifications & Reporting
Unit 3: Regression Testing and Management
Regression Frameworks
Test Suite Management
Analyzing Results
Tracking Progress
CI Best Practices
Regression Testing Frameworks
Unit 1: Regression Framework Fundamentals
Intro to Regression
Framework Architecture
Test Plan Management
Testbench Integration
Unit 2: Scripting and Automation
Scripting Languages
Automation Tools
Test Generation Scripts
Result Parsing Scripts
Unit 3: Result Analysis and Reporting
Analyzing Results
Report Generation
Coverage Analysis
Debugging Automation
Unit 4: Advanced Topics
Parallel Execution
Cloud Integration
ML for Regression